UDE® Debugger for ARC-V Processor IP™

MIPS ARC-V Processor IP™ is based on the open standard RISC-V instruction set architecture (ISA), extending the current ARC portfolio of MIPS, by GlobalFoundries. Built on the success of multiple generations of ARC processor IP covering a broad range of processor implementations, including functional safety (FS) versions, the ARC-V portfolio delivers what designers need to optimize and differentiate their SoC.

ARC-V Processor IP™ supported by UDE®