Multi-core Debugging (MCA) support

UDE Multi-core Aurix
Control of a multicore system and debugging is carried out with the UDE in a consistently designed user interface. Universal Multicore Workbench is a new add-on of the well-known modular Universal Debug Engine. With its outstanding features it helps developers of software for multicore SoC's to make your work more easily, clearly and efficiently.

The Universal Multicore Workbench offers especially for the new upcoming 32 bit multicore automotive architectures following functionality:

  • Multi-core debugging target manager to select cores and functional units for debugging Core- or user-specific visibility groups in UDE Open Platform including core specific coloring.
  • Multi-core program loader to distribute binary pattern and select core-specific symbol information.
  • Graphical code coverage analysis allows of structural coverage to fulfill ISO26262 requirements.
  •  Profiling functions based on instruction pointer trace data from On-chip Emulators ( MCDS and  SPU) including  AURORA trace,  Nexus,  ETM,  ETB, instruction pointer snooping or simulator output.
  • The Universal Emulation Configurator (UEC) describes measuring tasks for on-chip emulators.
  • Parallel test of software for multiple cores independently of their architecture within one user interface.
  • Synchronization of multiple cores for the debugging (common start and stop) and parallel visualization of context information after synchronized program execution.
  • Graphical visualization of variables from programs of different cores as time-based two-dimensional diagram in a common view.
  • The central management for download and distribution of software from one or more ELF files to multiple cores.
  • Multi-core trace with common analysis and visualization of executed program and data accesses in one or more views of the development user interface.
  • The use in a standalone Visual Platform beside the integration in a complete  Eclipse tool environment with complete cross debugger functionality.

Architectures