Microcontroller Trace Support with Universal Debug Engine

In depth real-time debugging requires close interaction with the processor. Tracing shall provide a chronological picture of a system's inner workings - before or after a critical event - mainly to help analyzing a faulty program.

Function Profiling Code coverage Execution sequence Variable access
Measurement Amount of execution time for each function Execution of code Call hierarchy and execution time sequence Memory changes
Requirements Code trace with tick information (Subroutine only possible) Code trace without tick information Code trace with tick information Data trace with tick information
Results Graphical chart and reports of Profiling Graphical chart and reports of Code Coverage Graphical chart of Sequences Graphical chart

The Multi-core Debug Solution (MCDS) integrated on the Emulation Extension Chip (EEC) of Infineons TC27xED is a powerful trace and event generation module. This new full-featured emulator onsilicon opens a new age of debugging capabilities.It allows to observe and control the running system in a very purposeful way. Elaborated filter mechanisms and a high visibility to the system internals (cores and busses) are the key features of MCDS. To make use of them the MCDS has to be configured for each trace task using the Universal Emulation Configurator (UEC).

UAD3+ with AURORA Trace
UAD3+ with AURORA Trace
Infineon has also implemented an AURORA GigaBit Trace (AGBT) interface on the Emulation Device in order to further increase testability of the new TC27xED AURIX microcontroller with multicore architecture. Emulation Devices of PowerArchitecture derivatives as MPC57xx, SPC57xx, SPC58xx supports AURORA interface, too. As a result, the trace memory can be greatly enlarged by connecting external hardware, which in turn allows the management of high-end trace tasks with large amounts of data, for example code coverage.

However, a 2.5 GB/s AURORA interface requires correspondingly high-performance hardware for signal acquisition, signal conditioning and preprocessing on the target. Therefore, not only is a trace pod with AGBT interface available for the UAD3+ from PLS, but it can also be equipped with up to 4 GByte of external trace memory. The Universal Access Device 3+ allows the recording of real-time trace information via a high speed serial trace based interface.

  • Support of AURORA based Trace protocols for Infineon and PowerArchitecture (Samtec ERF8 HS22, Samtec ERF8 HS34, additional customer specific trace connectors).
  • Maximum of 4 lanes supported, maximum data rate per lane is 3.125 Gbit/s
  • Trace memory scalable up to 4 GBytes
  • Time-endless trace for a continuous tracing and observation.

Hard real-time debugging requires close interaction with the processor. Tracing shall provide a chronological picture of a system inner working up to, starting from or in the vicinity an event, mainly to guide a human in understanding a faulty program. ETM and ETB were defined for this purpose and are available on the ARM derivatives.

Zynq-7000 Trace
Zynq-7000 Trace
The Universal Debug Engine provides support for all Zynq-7000 (Cortex-A9) specific trace features:

  • Instrumentation Trace Macrocell (ITM)
  • Program Trace Macrocell (PTM)
  • Fabric Trace Macrocell (FTM)
  • Tracing of both Cortex-A9 cores in parallel.

UDE reconstructs the time aligned program flow from captured trace data and presents it in the multicore aware trace window. For higher system analysis  Code Coverage as well as function  Profiling is available.

UDE supports program trace, data trace, watchpoint trace, ownership trace via the Nexus interface. This function is currently available - in combination with the Universal Access Device 3+ - for the Power Architecture™ derivatives MPC55xx, MPC56xx, MPC57xx from NXP as well as SPC56x, SPC57x, SPC58x from STMicroelectronics.

A 2-bit, 4-bit or even 12-bit and 16-bit wide trace data port with up to 250 MHz clock frequency are supported, whereby up to 1 megasamples can be recorded. With a compression of the trace data direct by the trace hardware, this represents a multiple of machine commands. Moreover, every sample can contain eight additional external hardware signals. Recording of the samples takes place synchronously to the Nexus clock frequency. This enables an optimal use of the trace memory and application optimized timestamps.

The trace stream can be exported as several output formats:

  • Raw Trace Data - Binary Trace Data as Read From the Target
  • UTF Trace Data in Binary Format - Universal Trace Format (UTF) in Binary Form
  • UTF Trace Data in Text Format - Universal Trace Format (UTF) in Human Readable Form
  • UTF Trace Data in HTML Format - Universal Trace Format (UTF) in Internet Browser Parsable Form
  • UTF Trace Data as Value Change Dump - Produce a Value Change Dump (VCD) From Decoded Trace Data.

In the trace window shown trace information can be exported also as further output formats:

  • TAB/SPACE separated Format - Columns from trace window as TAB/SPACE-separated text
  • XML Format - Columns from trace window saved in XML style.