Infineon AURIX™ is an enormous increase in performance. With Infineon's new 32 Bit multicore architecture Infineon AURIX™ (AUtomotive Realtime Integrated neXt generation architecture), an extremely high-performance microcontroller (MCU) platform meets the requirements for powertrain and safety applications of the automotive industry.
The first Infineon AURIX architecture based MCU, part number TC275T, contains three TriCore processor cores (version 1.6). Two of these are optimized for maximum performance (high-performance TriCore CPU 1.6P) and can execute up to three instructions in one cycle at a maximum clock frequency of 200 MHz. With the third core, a high-efficiency TriCore CPU 1.6E, lowest possible power consumption and an efficient data exchange with the peripherals are the most important factors. It can execute a maximum of one instruction per cycle and is currently clocked at a maximum of 200 MHz. The three TriCore processor cores are connected over a crossbar running at the full CPU speed and avoiding hardware contentions.
The existing Infineon TriCore AUDO™ architecture is well-known for a sophisticated On-Chip Debug System (OCDS). This was optimized further for the Aurix family and adapted to the requirements of multicore debugging. With the new Aurix devices, the following interfaces are provided for debug, test and calibration tools: JTAG with up to 40 MHz serial clock, 2-pin and 3-pin Device Access Ports (DAP) as well as a 3-pin DAP2 with up to 160 MHz serial clock. The block transfer rate of the DAP2 could be increased almost three-fold to 30 MByte/s by means of an optimized protocol. The development with associated tool manufacturers such as PLS was supported by suitable hardware tools such as for example the Universal Access Devices (UAD2/UAD3+) family.
UDE - Universal Debug Engine - is a flexible debug and emulator platform with Multicore debugging for Infineon TriCore 2 AURIX (MCA).
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