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ARM7™ (LPC2000, ST30, TMS470) Microcontrollers - Architectural Overview of the 32-Bit Microcontroller (ETM, ETB)

ARM Connected The ARM7 ™ embedded microcontroller core is a member of the Advanced RISC Machines (ARM®) family of general purpose 32-bit microprocessors, which offer high performance and very lower power consumption. Its outstanding feature is the 16-bit Thumb® subset of the most commonly used 32-bit instructions. These are expanded at run time with no degradation of system performance. This gives 16-bit code density (saving memory area and cost) coupled with 32-bit processor performance.

The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles, and the instruction set and related decode mechanism are much simpler than those of microprogrammed Complex Instruction Set Computers. This simplicity results in a high instruction throughput and impressive real-time interrupt response from a small and cost-effective chip. 

Pipelining is employed so that all parts of the processing and memory systems can operate continuously. Typically, while one instruction is being executed, its successor is being decoded, and a third instruction is being fetched from memory.

The ARM memory interface has been designed to allow the performance potential to be realized without incurring high costs in the memory system. Speed-critical control signals are pipelined to allow system control functions to be implemented in standard low-power logic, and these control signals facilitate the exploitation of the fast local access modes offered by industry standard dynamic RAMs.

UDE - Universal Debug Engine with ETM, ETB support - Debugger and Emulator for ARM7

UDE - Universal Debug Engine - is a flexible debug and emulator platform with Multi-core debugging.

Special feature support:

The UDE demo version within a Starterkit for ARM7 TDMI is available.

Supported ARM cores

  • ARM7TDMI
  • ARM710T
  • ARM720T
  • ARM740T
  • ARM7EJ

Supported Microcontrollers by Universal Debug Engine

  • Analog Devices ADuC7019, ADuC7020, ADuC7021, ADuC7022, ADuC7024, ADuC7025, ADuC7026, ADuC7027
  • Atmel AT91M40, AT91SAM7, AT91FR40162
  • Cirrus Logic EP7309, EP7311, EP7312
  • Freescale PAC72x1, PAC72x2, MAC71x1, MAC71x2, MAC71x4, MAC71x5, MAC71x6, MAC7241, MAC7242
  • NXP LPC2104, LPC2105, LPC2106
  • NXP LPC2114, LPC2119, LPC2124, LPC2129, LPC2131, LPC2132, LPC2134, LPC2136, LPC2138
  • NXP LPC2141, LPC2142, LPC2144, LPC2146, LPC2148, LPC2194
  • NXP LPC2210, LPC2212, LPC2214, LPC2220, LPC2292, LPC2294
  • NXP LPC2364, LPC2366, LPC2368, LPC2378, LPC2387
  • NXP LPC2468, LPC2470, LPC2478
  • NXP LPC2880, LPC2888
  • NetSilicon NS7520
  • NET+15, NET+20, NET+40, NET+50
  • STMicroelectronics ST30F771, ST30F772, ST30F774
  • STMicroelectronics STR710 (ARM720T) , STR711 , STR712 , STR720 , STR730 , STR731
    • STR750
  • TexasInstruments TMS470R1A64, TMS470R1A128, TMS470R1A256, TMS470R1A288, TMS470R1A384
  • TexasInstruments TMS470R1B512, TMS470R1B768

ARM7 TDMI ™ Architecture Feature Overview

  • 32/16-bit RISC architecture ( ARM v4T )
  • 32-bit ARM instruction set for maximum performance and flexibility
  • 16-bit Thumb instruction set for increased code density
  • Unified bus interface, 32-bit data bus carries both instructions and data
  • 8-, 16-, and 32-bit Data Types
  • Three-stage pipeline
  • 4GBytes Linear Address Space
  • 32-bit ALU and high-performance multiplier
  • Very small die size and low power consumption
  • Fully static operation
  • Coprocessor interface
  • Extensive debug facilities:
    • EmbeddedICE-RT real-time debug unit
    • On-chip JTAG interface unit
    • Interface for direct connection to Embedded Trace Macrocell (ETM)
  • Very Low Power Consumption: Industry-leader in MIPS/Watt
Trademarks: ARM, EmbeddedICE and Thumb are registered trademarks of ARM Limited. ARM7, ARM9 and Embedded Trace Macrocell, are trademarks of ARM Limited. ST is a registered trademark of companies belonging to the STMicroelectronics Group. All other brands or product names are the property of their respective holders.

 
 

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