ST10F273, ST10F276, ST10F269, ST10F296 Derivatives - Architectural Overview of the 16-Bit CMOS Single-Chip MicrocontrollersThe architecture of the ST10F269 combines the advantages of both RISC and CISC processors in a very well-balanced way. The sum of the features that are combined result in a high-performance microcontroller, which is the right choice not only for today's applications but also for future engineering challenges. The ST10F269 not only integrates a powerful CPU core and a set of peripheral units into one chip but also connects the units in a very efficient way. One of the four buses used concurrently on the ST10F269 is the XBUS, an internal representation of the external bus interface. This bus provides a standardized method of integrating application-specific peripherals to produce derivatives of the standard ST10F269. Supported ST10 Derivatives by Universal Debug Engine - STMicroelectronics ST10R163
- STMicroelectronics ST10F163
- STMicroelectronics ST10R165
- STMicroelectronics ST10F166
- STMicroelectronics ST10R167
- STMicroelectronics ST10F167
- STMicroelectronics ST10F168
- STMicroelectronics ST10F169
- STMicroelectronics ST10R172
- STMicroelectronics ST10F251
- STMicroelectronics ST10F252
- STMicroelectronics ST10F269
- STMicroelectronics ST10R271
- STMicroelectronics ST10R272
- STMicroelectronics ST10R273
- STMicroelectronics ST10R275
- STMicroelectronics ST10F276
- STMicroelectronics ST10F280
- STMicroelectronics ST10F282
- STMicroelectronics ST10F296
Summary of Basic Features of ST10The ST10R167, ST10F167, ST10F168, ST10F273, ST10F275, ST10F276, ST10F269 are representatives of the STMicroelectronics family of full featured 16-bit single-chip CMOS microcontrollers. It combines high CPU performance (up to 20 million instructions per second) with high peripheral functionality and modes for power reduction. Several key features contribute to the high performance of the ST10F269 (the indicated timings refer to a CPU clock speed of 40 MHz). High Performance 16-Bit CPU With Four-Stage Pipeline - 50 ns minimum instruction cycle time, with most instructions executed in 1 cycle
- 16-bit x 16-bit multiplication, 40-bit Accumulator
- Multiple high-bandwidth internal data buses
- Register based design with multiple variable register banks
- Single cycle context switching support
- 16MBytes linear address space for code and data (von Neumann architecture)
- System stack cache support with automatic stack overflow/underflow detection
Control Oriented Instruction Set with High Efficiency - Bit, byte, and word data types
- Flexible and efficient addressing modes for high code density
- Enhanced boolean bit manipulation with direct addressability of 6 kbits for peripheral control and user defined flags
- Hardware traps to identify exception conditions during runtime
- HLL support for semaphore operations and efficient data access
Integrated On-Chip Memory - 2 kByte internal RAM for variables, register banks, system stack and code
- up to 10 kByte on-chip high-speed XRAM for variables, user stack and code (not on all derivatives)
- up to 256 kByte on-chip Program FLASH Memory (not for romless devices)
External Bus Interface - Multiplexed or demultiplexed bus configurations
- Segmentation capability and chip select signal generation
- 8-bit or 16-bit data bus
- Bus cycle characteristics selectable for five programmable address areas
16-Priority-Level Interrupt System - 56 interrupt nodes with separate interrupt vectors
- 240/400 ns typical/maximum interrupt latency in case of internal program execution
- Fast external interrupts
8-Channel Peripheral Event Controller (PEC) - Interrupt driven single cycle data transfer
- Transfer count option (standard CPU interrupt after a programmable number of PEC transfers)
- Eliminates overhead of saving and restoring system state for interrupt requests
Intelligent On-Chip Peripheral Subsystems - 16-Channel 10-bit A/D Converter with programmable conversion time (4.85 us minimum), auto scan modes, channel injection mode
- Two 16-Channel Capture/Compare Units with 2 independent time bases each, very flexible PWM unit/event recording unit with different operating modes, includes four 16-bit Timers/counters, maximum resolution fCPU /8
- 4-Channel PWM Unit
- Two Multifunctional General Purpose Timer Units GPT1: three 16-bit timers/ counters, maximum resolution fCPU /8 GPT2: two 16-bit timers/counters, maximum resolution fCPU /4
- Asynchronous/Synchronous Serial Channels (USART) with baud rate generator, parity, framing, and overrun error detection
- High Speed Synchronous Serial Channel programmable data length and shift direction
- Two On-Chip CAN Bus Module, Rev. 2.0B active (30 or 2x15 Message Objects)
- Watchdog Timer with programmable time intervals
- ASC Bootstrap loader for flexible system initialization
- CAN Bootstrap loader for flexible system initialization
UDE - Universal Debug EngineUDE - Universal Debug Engine - is a flexible debug platform with Multi-core debugging. This development workbench is available for Infineon’s 16-bit architecture SAB C16x, C166CBC, C166S V2, the 32-bit TriCore TC1766, TC1796 as well the ST10F16x, ST10F26x and ST10F280 architecture from STMicroelectronics, the ARM7, ARM9, PowerPC and XScale derivatives.
It lets you organize your projects, supports you while building applications and lets you run and test your software in a convenient and cost-efficient way. UDE represents a completely new debugger architecture and tool concept based on a customizable set of standard components and core specific add-ons.
JTAG is fully supported by UDE offering direct high-speed access to the MCUs internal units (registers, control unit...) and features like breakpoints, stepping in ROM/FLASH as well as complex trigger conditions without any external hardware or software resources. OCDS L2 and MCDS instruction trace capability is available for members of the TriCore family. ETM and ETB instruction trace is available for ARM derivatives. Target ROM monitor and Bootstrap loader / RAM monitor solutions for a flexible access via a wide variety of debug channels (ASC, SSC, 3-PIN, CAN) are available.
UDE MemTool as a part of UDE is designed for On-Chip and On-Board FLASH/OTP programming with microcontroller systems using SAB C16x, C166CBC, C166S-V2, XC16x, ST10, TriCore, ARM7, ARM9, PowerPC and XScale derivatives.
The UDE demo version within a Starterkit for ST10/C16x is available.
Trademarks: ST is a registered trademark of companies belonging to the STMicroelectronics Group. All other brands or product names are the property of their respective holders. |
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News
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Freescale’s Power Architecture™ MPC5510 now supported by UDE UDE supports Power Architecture™ MPC5510 from Freescale with unlimited multicore debugging |
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UDE supports new AUDO FUTURE family from Infineon UDE supports new 32 bit microcontroller family AUDO FUTURE from Infineon: TC1736, TC1767, TC1797 and emulation devices TC1767ED, TC1797ED |
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UDE supports additional PowerPC family pls have present at embedded world 2008 a new version of its Universal Debug Engine (UDE), tailored to the special features of AMCCs high-end PowerPC family 440. |
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Infineon's new XE166 realtime signal controllers supported At the same time as the market introduction of the XE166 real time signal controllers. pls introduces the Universal Debug Engine 2.2 |
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New major version of UDE 2.2 Highlights: ++ Full compatibility for Windows Vista ++ New additional front end with look and feel of Microsoft Visual Studio 2005 ++ ... |
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EventsVisit us at the Embedded Systems Conference 2008 San Jose, CA, Booth #3020 Read more ...
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