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Instruction Trace - MCDS, Aurora Gigabit, OCDS L2, ETM, ETB, Nexus and Triggered Transfers

In depth real-time debugging requires close interaction with the processor. Tracing shall provide a chronological picture of a system's inner workings - before or after a critical event - mainly to help analyzing a faulty program.

Aurora Gigabit Instruction Trace with MCDS Support

For the first time, an Aurora GigaBit Trace (AGBT) interface was also implemented on the Emulation Device of the TC257T AURIX. This enables a significant enlargement of the trace memory by connecting external hardware and thus high-end trace tasks with large amounts of data, for example code coverage. However, a 2.5 Gbit/s Aurora interface requires a correspondingly high-performance hardware for signal acquisition, signal conditioning and pre-processing on the target. A corresponding Trace-Pod with AGBT interface is already available for the UAD3+ from PLS. The up to 4 GByte of external trace memory of the UAD3+ are sufficient for support of even the most demanding measurement tasks.

For program trace, data trace and even bus trace, Infineon again relies on the proven concept of the Emulation Devices (ED) with integrated Multi-Core Debug Solution (MCDS). The Emulation Devices are pin-compatible with the production chip, but contain a sophisticated observation and trigger logic as well as currently up to 2 MByte of emulation memory. A whole series of enhancements were also made here for the Aurix family. For example, two CPUs, two further units connected on the crossbar as well as the System Peripheral Bus (SPB) in the trace stream can be monitored in parallel. Programming of the Emulation Device logic can be comfortably carried out with the Universal Emulation Configurator (UEC) from PLS, because this offers a graphical configuration of measurement tasks based on the concept of signals/actions linked via a state machine.

Serial Trace Pod

The Universal Access Device 3+ allows the recording of real-time trace information up to 3.125 Gbit/s in serial trace.

Aurora trace connector (up to 4 lanes)

Samtec ERF8 HS33
Samtex ERF8 HS34
Additional custommer specific trace connectors

Trace memory up to 4 GByte available
Time-endless trace for a continuous tracing and observation
Variable time stamps possible, inserted by the trace board frontend
Separate Trace pod is connected to the UAD3+ by a Gigabit serial multi-lane cable up to 5 meters long (0.5m, 1m - default, 2m and 5m)
External Trigger Pins.

MCDS Instruction Trace MCDS Instruction Trace

The Multi Core Debug Solution (MCDS) integrated on the Emulation Extension Chip (EEC) of Infineons TC1796ED, TC1797ED and TC275T is a powerful trace and event generation module. This new full-featured emulator onsilicon opens a new age of debugging capabilities.It allows to observe and control the running system in a very purposeful way. Elaborated filter mechanisms and a high visibility to the system internals (cores and busses) are the key features of MCDS. To make use of them the MCDS has to be configured for each trace task using the Universal Emulation Configurator (UEC).

Universal Emulation Configurator (UEC) for TriCore Emulation Device

The Universal Emulation Configurator (UEC) is the hardware-independent tool to describe measuring tasks for on-chip emulators and is comparable with development environments for the hardware draft. With its assistance development engineers can also create configuration data for an on- chip emulator without large expenditure of time and this independently of the respective target hardware.
With the "Universal Emulation Configurator" the developer gets a top-notch configuration tool just right for demanding measuring tasks with on-chip emulators.

Major benefits of using the UEC are:

Functional description on basis of a state machine
Being independent from the respective target and emulator hardware
Fast and simple definition of complex measuring tasks

This is done by joining pre-defined subtasks from expandable libraries and defines parameters.

MCDS is supported by the TriCore family, including TC1766ED, TC1796ED, TC1767ED, TC1797ED, TC275T derivatives.

Universal Emulation Configurator 2 (UEC2) for XC2000 Emulation Device

The so-called emulation device XC2000ED with integrated on chip emulator is available for development and test purposes. Up to now only the Universal Emulation Configurator UEC2 from pls offers a complete support of this high-performance debug hardware. This is especially true for the integrated performance counter of the XC2000ED. With this unit, important data - such as instruction counter, interrupt acknowledges, stall and idle cycles and many more - can be recorded and analyzed for application optimization.

MCDS is supported by the XC2000ED family, including XC2080ED and XC2090ED.

On-chip Debug Support OCDS L2 Instruction Trace for TriCore

The OCDS L2 (On-chip Debug Support Level 2) unit of the TriCore derivatives supports the recording of a running program's trace. In combination with the JTAG OCDS L1 unit a comfortable watching of the program flows of the core, the PCP/PCP2 processor and the DMA processor in real-time are possible. UDE supports the OCDS unit by the Universal Access Device - Trace Board option.

60 Pin OCDS L2 High-speed Connector Pod

Proposed by Infineon to support connection to OCDS L2 port of TriCore 1.3 systems (TC11xx, TC17xx, TC19xx and future derivatives)
Connector system based on SAMTEC 60 pin highspeed connector QSH-030-01-F-D-A
Prepared to use for systems up to 180 MHz system clock
Supports 2,5V to 3,6V I/O ring voltage

OCDS L2 is supported by the TriCore TC1130, TC1161, TC1163, TC1166, TC1775, TC1762, TC1764, TC1766, TC1796, TC1920 and other derivatives.

MCDS and OCDS L2 Trace Feature Comparison

TriCore Microcontrollers

The following table gives an overview about the OCDS L2 and MCDS trace features of the Infineon TriCore microcontrollers.

Feature list	MCDS	MCDS	OCDS L2
TriCore Derivatives	TC1767ED, TC1797ED	TC1796ED, TC1766ED	TC1130, TC1161, TC1766, TC1796, ..
TriCore Instruction Pointer Trace
DMA Trace
PCP Instruction Pointer Trace
PCP Channel (Priority) Trace
Data Trace, Watch point Trace, Bus Trace
TriCore-PCP mixed Instruction Pointer Trace
Number of Ranges to be traced simultaneously	6 ranges for TC, 4 ranges for PCP	6 ranges for TC, 4 ranges for PCP	1 range
OCDSL1 Trigger Condition
Sequential Trigger Condition
Reference-Clock (USB-Clock) based Time Stamps	(emulation clock or FlexRay clock)	(emulation clock or USB clock)
Time based Trigger Condition
Tick based Time Stamps
Single shot Time Stamps for Time measurement
Stopping TriCore and/or PCP on Trigger Condition			manual configuration
Emitting Signal on external Break pin on Trigger			manual configuration
Performance counters
Connector	16-pin standard JTAG Connector	16-pin standard JTAG Connector	60-pin OCDS L2 Connector with Trace pod
UDE-Tool Ordering Code	UDE-TC/UAD2 and UDE-TC UEC	UDE-TC/UAD2 and UDE-TC UEC	UDE-TC/UAD2+ and UDE-TC L2

XC2000 Microcontrollers

The following table gives an overview about the MCDS trace features of the Infineon XC2000 Emulation Device microcontrollers.

Feature list	MCDS
XC2000ED Derivatives	XC2080ED, XC2090ED
Instruction Pointer Trace
Data Trace, Watch point Trace
Number of instruction pointer ranges to be traced simultaneously	4 ranges
OCDSL1 Trigger Condition
Sequential Trigger Condition
Delta-comparators on read/written data
Reference-Clock (USB-Clock) based Time Stamps	(emulation clock)
Time based Trigger Condition
Tick based Time Stamps
Single shot Time Stamps for Time measurement
Stopping XC2000 on Trigger Condition
Emitting Signal on external Break pin on Trigger
Performance counters
Connector	16-pin standard JTAG Connector
UDE-Tool Ordering Code	UDE-XC166/UAD2 and UDE-XC2000 UEC2

ETM Instruction Trace

The Embedded Trace Macrocell (ETM) of ARM derivatives is used to capture processor states in real-time using a dedicated connection to the derivative.

UDE supports ETM as 4 bit or 8 bit trace port up to 170 MHz system clock. The program and data trace allows to record up to 1 MSamples. By compiling the trace data directly via the trace hardware this sample rate complies with a multitude of machine code instructions. Each sample is able to contain eight additional external hardware signals. Recording is synchronous to the system clock frequency. This ensures the optimal use of the trace memory and allows application specific time stamps. Start and stop of recording is comfortably controlled via triggers. The total performance of the ETM unit is available for trigger events. The comfortable trace window included in the user interface offers a direct link to the user from trace samples to the related source code, monitoring the runtime of the program based on the time stamps and comprehensive search functions. UDE supports the ETM unit by the Universal Access Device - Trace Board option.

38 Pin ETM High-speed Connector Pod

Proposed by ARM to support connection to ETM port of ARM systems (LPC21xx and further ARM7, ARM9, ARM11, Cortex derivatives)
Connector system based on 38 pin high-speed connector AMP-MICTOR
Supports 2,5V to 3,6V I/O ring voltage

ETM is supported by the Philips LPC2xxx, AT91RM9200, STR910, Cortex-M3 derivatives and other derivatives.

ETB Instruction Trace

The Embedded Trace Buffer (ETB) extends the ETM unit of ARM derivatives by an embedded on-chip circular trace buffer. This simplifies the adaptation of external trace units because the high speed trace signaling does not need to transfer to the external unit. The trace buffer is managed and read via the JTAG communication channel.

ETB is supported by UDE with the Philips LPC3000 derivatives.

Nexus Instruction Trace

UDE supports program trace via the Nexus interface. This function is currently available - in combination with the Universal Access Device 2+ - for the Power Architecture® derivatives MPC55xx and MPC56xx from Freescale as well as SPC56xx from STMicroelectronics.

A 2-bit, 4-bit or, with the MCUs of the MPC55xx family, even 12-bit wide trace data port with up to 180 MHz clock frequency are supported, whereby up to 1 megasamples can be recorded. With a compression of the trace data direct by the trace hardware, this represents a multiple of machine commands. Moreover, every sample can contain eight additional external hardware signals. Recording of the samples takes place synchronously to the Nexus clock frequency. This enables an optimal use of the trace memory and application optimized timestamps.

Start and stop of the recording can be comfortably controlled via pre-trigger, mid-trigger, post-trigger or address-trigger. The trace window in the user interface offers the developer a direct link from the trace samples to the associated source code, the display of the program runtime on the basis of the timestamps as well as extensive search functions.

Triggered Transfers

The UDE TTF Recorder uses the Triggered Transfer feature of new Infineon microcontrollers. Triggered Transfer is part of the on-chip debug support implemented on these controllers. It allows transferring the value of a single memory location via the JTAG debug interface.

The transfer is triggered by a debug event of the onchip debug support (OCDS) unit. There are several types of debug events that can trigger the transfer depending on the actual type of controller. A typical use case provided by all supported controller types is to trigger on write accesses on a single variable and to transfer the new value of the variable.

The recording is done while the target system is in running state.

Trademarks: ARM, EmbeddedICE, Embedded Trace Macrocell are trademarks of ARM Limited. TriCore is a trademark of Infineon Technologies.