Multi-core Debugging with UDE
Universal Multi-Core WorkbenchUniversal Multi-Core Workbench is a new add-on of the well-known modular "Universal Debug Engine". With its outstanding features it helps developers of software for multi-core SoC's to make your work more easily, clearly and efficiently. The Universal Multi-Core Workbench offers especially for the new upcoming 32 bit multi-core automotive architectures following functionality:
- The parallel test of software for multiple cores independently of their architecture within one user interface.
- The synchronization of multiple cores for the debugging (common start and stop) and parallel visualization of context information after synchronized program execution.
- The graphical visualization of variables from programs of different cores as time-based two-dimensional diagram in a common view.
- The central management for download and distribution of software from one or more ELF files to multiple cores.
- Multi-Core Trace with common analysis and visualization of executed program and data accesses in one or more views of the development user interface.
- The use in a standalone Visual Platform beside the integration in a complete Eclipse tool environment with complete cross debugger functionality.
In summary the "Universal Multi-Core Workbench" is a new development tool which strongly optimizes the debugging and test of software for multi-core SoC's.
In practice the new Universal Multi-Core Workbench is used for the first time for the new multi-core microcontrollers for automotive applications which were published at the end of last year from Infineon and Joint Development Program from Freescale and STMicroelectronics.
These new multi-core devices are milestones for the real-time efficiency of automotive applications. They contain three processor cores which are connected in such a way by a crossbar that they are running with full speed and without any access conflict. Further the implementation contains some FLASH modules and an easy to use and powerful micro programmable Timer Module (up to 8 micro cores) which relieves the main CPU's by nearly independent generation of engine control signals. These devices demand new concepts and debugging functions for development of engine control unit (ECU) software.
The new functions for test of multi-core software running on up to 5 cores (three main cores, micro programmable Timer Module and Security Core) in hard real time will used for the first time for power train (engine and transmission control) by the market leaders for ECU's. |