Cortex™-M3 - Architectural Overview of the 32-Bit Single-Chip MicrocontrollersThe Cortex™-M3 processor is an ARM 32-bit RISC processor based on the ARM v7-M architecture. It has been developed to provide a high-perfomance, low-cost platform for automotive body systems, industrial control system and wireless networking. Supported Cortex coresSupported Derivatives by Universal Debug EngineCortex™ Architecture Feature Overview- 32/16-bit RISC architecture (ARM v7-M)
- 16-bit Thumb®2 instruction set for high code density
- Harvard bus architecture
- Three-stage pipeline with branch speculation
- Nested Vector Interrupt Controller
- Interrupt Latency 12 cycles
- 4GBytes Linear Address Space
- 32-bit multiplication in a single cycle
- Configurable from 1-240 physical interrupts; up to 256 levels of priority
- Integrated peripheral: Vector-Interrupt-Controller (VIC), Memory-Protection (MPU), Timer, Debug (DWT) and Trace (ETM)
UDE - Universal Debug EngineUDE - Universal Debug Engine
- is a flexible debug platform with Multi-core debugging. This
development workbench is available for 16-bit architectures SAB C166,
C166CBC, XC166, XC2000, XE166 and 32-bit architectures TriCore,
PowerPC, ARM7, ARM9, ARM11, Cortex-M3 and XScale.
Trademarks: ARM, EmbeddedICE and Thumb are registered
trademarks of ARM Limited. ARM7, ARM9 and Embedded Trace Macrocell, are
trademarks of ARM Limited. Cortex is a trademark of ARM Limited. ST is a registered trademark of companies
belonging to the STMicroelectronics Group. All other brands or product
names are the property of their respective holders.
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