Cortex™-M0, Cortex™-M3 (STM32, LPC1000, TMPM3xxx), Cortex™-M4, Cortex™-A8 Microcontrollers - Architectural Overview of the 32-Bit Microcontroller (SWD, SWV, ITM)

The ARM Cortex™-M0 processor is a small, low power and most energy-efficient ARM processor. The ARM Cortex™-M3 processor is an ARM® 32-bit RISC processor based on the ARM v7-M architecture. It has been developed to provide a high-perfomance, low-cost platform for automotive body systems, industrial control system and wireless networking. The ARM Cortex™-M4 enhances the Cortex™-M3 processor with DSP functionality. It based on the ARM v7-ME architecture. The ARM Cortex™-R4 processor real-time processor to be based on the ARMv7-R architecture. The ARM Cortex™-A8 processor is based on the ARMv7 architecture and has the ability to scale in speed from 600MHz to greater than 1GHz.

UDE - Universal Debug Engine with SWD, SWV, ITM support - Cortex™ Debugger and Emulator for Cortex-M3, Cortex-M4, Cortex-A8

UDE - Universal Debug Engine - is a flexible debug and emulator platform with Multi-core debugging for Cortex™.

Special feature support:

• IP trace
• Serial Wire Debug (SWD) support
• Serial Wire Viewer (SWV) support
• Embedded Trace Macrocell (ETM ) support
• Instrumentation Trace Macrocell (ITM ) support
• FLASH Memory programming

Supported Cortex cores

• Cortex™-M0
• Cortex™-M3
• Cortex™-M4
• Cortex™-R4
• Cortex™-A8

Supported Microcontrollers by Universal Debug Engine

• Atmel AT91SAM3
• EnergyMicro EFM32G, EFM32TG
• Freescale Kinetis K10, K20, K30, K50, K60
  
• Freescale i.MX51
• Infineon XMC4000
  
• LuminaryMicro LM3S
• Nuvoton NuMicro NUC100, NUC120, NUC130, NUC140
• NXP LPC1000, LPC1700, LPC1800
• NXP LPC4300
  
• Toshiba TX03, TPMP330
• TexasInstruments OMAP35
• TexasInstruments TMS570
  
• STMicroelectronics STM32

Cortex™ Architecture Feature Overview

• 32/16-bit RISC architecture (ARM v7, ARM v7-M, ARM v7-ME)
• 16-bit Thumb®2 instruction set for high code density
• Harvard bus architecture
• Three-stage pipeline with branch speculation
• Nested Vector Interrupt Controller
• Interrupt Latency 12 cycles
  
• 4 GBytes Linear Address Space
• 32-bit multiplication in a single cycle
  
• Configurable from 1-240 physical interrupts; up to 256 levels of priority
• Integrated peripheral: Vector-Interrupt-Controller (VIC), Memory-Protection (MPU), Timer, Debug (DWT) and Trace (ETM)